Commit 14e6e223 authored by Catalin Marinas's avatar Catalin Marinas

RealView: Add the SMP initialisation support for PB11MPCore

This patch adds the initialisation calls for the SMP support on the
PB11MPCore platform.
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>



parent 0e71aedf
......@@ -20,6 +20,7 @@
#include <asm/mach-types.h>
#include <asm/arch/board-eb.h>
#include <asm/arch/board-pb11mp.h>
#include <asm/arch/scu.h>
extern void realview_secondary_startup(void);
......@@ -37,6 +38,9 @@ static unsigned int __init get_core_count(void)
if (machine_is_realview_eb() && core_tile_eb11mp()) {
ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);
ncores = (ncores & 0x03) + 1;
} else if (machine_is_realview_pb11mp()) {
ncores = __raw_readl(__io_address(REALVIEW_TC11MP_SCU_BASE) + SCU_CONFIG);
ncores = (ncores & 0x03) + 1;
} else
ncores = 1;
......@@ -50,9 +54,15 @@ static void scu_enable(void)
{
u32 scu_ctrl;
if (machine_is_realview_eb() && core_tile_eb11mp()) {
scu_ctrl = readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CTRL);
scu_ctrl |= 1;
writel(scu_ctrl, __io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CTRL);
} else if (machine_is_realview_pb11mp()) {
scu_ctrl = readl(__io_address(REALVIEW_TC11MP_SCU_BASE) + SCU_CTRL);
scu_ctrl |= 1;
writel(scu_ctrl, __io_address(REALVIEW_TC11MP_SCU_BASE) + SCU_CTRL);
}
}
/*
......@@ -63,7 +73,8 @@ void cpu_smp_enable(unsigned int cpu)
register u32 aux_ctrl;
unsigned long flags;
if (machine_is_realview_eb() && core_tile_eb11mp()) {
if ((machine_is_realview_eb() && core_tile_eb11mp())
|| machine_is_realview_pb11mp()) {
local_irq_save(flags);
flush_cache_all();
asm __volatile__(
......@@ -96,7 +107,10 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
* core (e.g. timer irq), then they will not have been enabled
* for us: do so
*/
if (machine_is_realview_eb() && core_tile_eb11mp())
gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
else if (machine_is_realview_pb11mp())
gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
/*
* let the primary processor know we're out of the
......@@ -237,7 +251,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
* dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
* realview_timer_init
*/
if (machine_is_realview_eb() && core_tile_eb11mp())
if ((machine_is_realview_eb() && core_tile_eb11mp())
|| machine_is_realview_pb11mp())
local_timer_setup(cpu);
#endif
......
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