Commit 0d621728 authored by kishore kadiyala's avatar kishore kadiyala Committed by James Toy

Add basic support for all 5 MMC controllers on OMAP4.

This patch doesn't include mmc-regulator support
Signed-off-by: default avatarKishore Kadiyala <kishore.kadiyala@ti.com>
Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com>
Cc: <madhu.cr@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Cc: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent 2bd077ec
...@@ -397,7 +397,7 @@ static inline void omap_init_sha1_md5(void) { } ...@@ -397,7 +397,7 @@ static inline void omap_init_sha1_md5(void) { }
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
#ifdef CONFIG_ARCH_OMAP3 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
#define MMCHS_SYSCONFIG 0x0010 #define MMCHS_SYSCONFIG 0x0010
#define MMCHS_SYSCONFIG_SWRESET (1 << 1) #define MMCHS_SYSCONFIG_SWRESET (1 << 1)
...@@ -424,8 +424,8 @@ static struct platform_device dummy_pdev = { ...@@ -424,8 +424,8 @@ static struct platform_device dummy_pdev = {
**/ **/
static void __init omap_hsmmc_reset(void) static void __init omap_hsmmc_reset(void)
{ {
u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC : u32 i, nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
OMAP24XX_NR_MMC; (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
for (i = 0; i < nr_controllers; i++) { for (i = 0; i < nr_controllers; i++) {
u32 v, base = 0; u32 v, base = 0;
...@@ -442,8 +442,21 @@ static void __init omap_hsmmc_reset(void) ...@@ -442,8 +442,21 @@ static void __init omap_hsmmc_reset(void)
case 2: case 2:
base = OMAP3_MMC3_BASE; base = OMAP3_MMC3_BASE;
break; break;
case 3:
if (!cpu_is_omap44xx())
return;
base = OMAP4_MMC4_BASE;
break;
case 4:
if (!cpu_is_omap44xx())
return;
base = OMAP4_MMC5_BASE;
break;
} }
if (cpu_is_omap44xx())
base += OMAP4_MMC_REG_OFFSET;
dummy_pdev.id = i; dummy_pdev.id = i;
dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i); dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
iclk = clk_get(dev, "ick"); iclk = clk_get(dev, "ick");
...@@ -581,11 +594,23 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, ...@@ -581,11 +594,23 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
irq = INT_24XX_MMC2_IRQ; irq = INT_24XX_MMC2_IRQ;
break; break;
case 2: case 2:
if (!cpu_is_omap34xx()) if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
return; return;
base = OMAP3_MMC3_BASE; base = OMAP3_MMC3_BASE;
irq = INT_34XX_MMC3_IRQ; irq = INT_34XX_MMC3_IRQ;
break; break;
case 3:
if (!cpu_is_omap44xx())
return;
base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
irq = INT_44XX_MMC4_IRQ;
break;
case 4:
if (!cpu_is_omap44xx())
return;
base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
irq = INT_44XX_MMC5_IRQ;
break;
default: default:
continue; continue;
} }
...@@ -593,8 +618,15 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, ...@@ -593,8 +618,15 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
if (cpu_is_omap2420()) { if (cpu_is_omap2420()) {
size = OMAP2420_MMC_SIZE; size = OMAP2420_MMC_SIZE;
name = "mmci-omap"; name = "mmci-omap";
} else if (cpu_is_omap44xx()) {
if (i < 3) {
base += OMAP4_MMC_REG_OFFSET;
irq += IRQ_GIC_START;
}
size = OMAP4_HSMMC_SIZE;
name = "mmci-omap-hs";
} else { } else {
size = HSMMC_SIZE; size = OMAP3_HSMMC_SIZE;
name = "mmci-omap-hs"; name = "mmci-omap-hs";
} }
omap_mmc_add(name, i, base, size, irq, mmc_data[i]); omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
......
...@@ -503,6 +503,7 @@ ...@@ -503,6 +503,7 @@
#define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START) #define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
#define INT_44XX_SHA1MD51_IRQ (51 + IRQ_GIC_START) #define INT_44XX_SHA1MD51_IRQ (51 + IRQ_GIC_START)
#define INT_44XX_RNG_IRQ (52 + IRQ_GIC_START) #define INT_44XX_RNG_IRQ (52 + IRQ_GIC_START)
#define INT_44XX_MMC5_IRQ (59 + IRQ_GIC_START)
#define INT_44XX_I2C3_IRQ (61 + IRQ_GIC_START) #define INT_44XX_I2C3_IRQ (61 + IRQ_GIC_START)
#define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START) #define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
#define INT_44XX_PBIAS_IRQ (75 + IRQ_GIC_START) #define INT_44XX_PBIAS_IRQ (75 + IRQ_GIC_START)
...@@ -511,6 +512,7 @@ ...@@ -511,6 +512,7 @@
#define INT_44XX_TLL_IRQ (78 + IRQ_GIC_START) #define INT_44XX_TLL_IRQ (78 + IRQ_GIC_START)
#define INT_44XX_PARTHASH_IRQ (79 + IRQ_GIC_START) #define INT_44XX_PARTHASH_IRQ (79 + IRQ_GIC_START)
#define INT_44XX_MMC3_IRQ (94 + IRQ_GIC_START) #define INT_44XX_MMC3_IRQ (94 + IRQ_GIC_START)
#define INT_44XX_MMC4_IRQ (96 + IRQ_GIC_START)
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
......
...@@ -25,11 +25,18 @@ ...@@ -25,11 +25,18 @@
#define OMAP24XX_NR_MMC 2 #define OMAP24XX_NR_MMC 2
#define OMAP34XX_NR_MMC 3 #define OMAP34XX_NR_MMC 3
#define OMAP44XX_NR_MMC 5
#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE #define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
#define HSMMC_SIZE 0x200 #define OMAP3_HSMMC_SIZE 0x200
#define OMAP4_HSMMC_SIZE 0x1000
#define OMAP2_MMC1_BASE 0x4809c000 #define OMAP2_MMC1_BASE 0x4809c000
#define OMAP2_MMC2_BASE 0x480b4000 #define OMAP2_MMC2_BASE 0x480b4000
#define OMAP3_MMC3_BASE 0x480ad000 #define OMAP3_MMC3_BASE 0x480ad000
#define OMAP4_MMC4_BASE 0x480d1000
#define OMAP4_MMC5_BASE 0x480d5000
#define OMAP4_MMC_REG_OFFSET 0x100
#define HSMMC5 (1 << 4)
#define HSMMC4 (1 << 3)
#define HSMMC3 (1 << 2) #define HSMMC3 (1 << 2)
#define HSMMC2 (1 << 1) #define HSMMC2 (1 << 1)
#define HSMMC1 (1 << 0) #define HSMMC1 (1 << 0)
......
...@@ -132,11 +132,11 @@ config MMC_OMAP ...@@ -132,11 +132,11 @@ config MMC_OMAP
config MMC_OMAP_HS config MMC_OMAP_HS
tristate "TI OMAP High Speed Multimedia Card Interface support" tristate "TI OMAP High Speed Multimedia Card Interface support"
depends on ARCH_OMAP2430 || ARCH_OMAP3 depends on ARCH_OMAP2430 || ARCH_OMAP3 || ARCH_OMAP4
help help
This selects the TI OMAP High Speed Multimedia card Interface. This selects the TI OMAP High Speed Multimedia card Interface.
If you have an OMAP2430 or OMAP3 board with a Multimedia Card slot, If you have an OMAP2430 or OMAP3 board or OMAP4 board with a
say Y or M here. Multimedia Card slot, say Y or M here.
If unsure, say N. If unsure, say N.
......
...@@ -109,6 +109,8 @@ ...@@ -109,6 +109,8 @@
#define OMAP_MMC1_DEVID 0 #define OMAP_MMC1_DEVID 0
#define OMAP_MMC2_DEVID 1 #define OMAP_MMC2_DEVID 1
#define OMAP_MMC3_DEVID 2 #define OMAP_MMC3_DEVID 2
#define OMAP_MMC4_DEVID 3
#define OMAP_MMC5_DEVID 4
#define MMC_TIMEOUT_MS 20 #define MMC_TIMEOUT_MS 20
#define OMAP_MMC_MASTER_CLOCK 96000000 #define OMAP_MMC_MASTER_CLOCK 96000000
...@@ -1761,6 +1763,14 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) ...@@ -1761,6 +1763,14 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev)
host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; host->dma_line_tx = OMAP34XX_DMA_MMC3_TX;
host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; host->dma_line_rx = OMAP34XX_DMA_MMC3_RX;
break; break;
case OMAP_MMC4_DEVID:
host->dma_line_tx = OMAP44XX_DMA_MMC4_TX;
host->dma_line_rx = OMAP44XX_DMA_MMC4_RX;
break;
case OMAP_MMC5_DEVID:
host->dma_line_tx = OMAP44XX_DMA_MMC5_TX;
host->dma_line_rx = OMAP44XX_DMA_MMC5_RX;
break;
default: default:
dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); dev_err(mmc_dev(host->mmc), "Invalid MMC id\n");
goto err_irq; goto err_irq;
......
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