Commit cc90ef0f authored by David Hardeman's avatar David Hardeman Committed by Wim Van Sebroeck

[WATCHDOG] i6300esb.patch

I wrote earlier to the list[1] asking for a driver for the watchdog
included in the 6300ESB chipset.  I got a 2.4 driver via private email
from Ross Biro which I've changed into what I hope resembles a 2.6
driver (which was done by looking a lot at the watchdog drivers
already in the 2.6 tree).

I've attached the result, and I'm hoping to get some feedback on the
coding as a first step.  I can't actually test it on the hardware
right now as I won't have physical access until April. So my own tests
have been limited to "compiles-without-warnings" and
"can-be-insmodded-in-other-machine-without-oops".

[1] http://marc.theaimsgroup.com/?l=linux-kernel&m=110711079825794&w=2
[2] http://marc.theaimsgroup.com/?l=linux-kernel&m=110711973917746&w=2Signed-off-by: default avatarDavid Hardeman <david@2gen.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
parent 3be10211
...@@ -234,6 +234,16 @@ config WAFER_WDT ...@@ -234,6 +234,16 @@ config WAFER_WDT
To compile this driver as a module, choose M here: the To compile this driver as a module, choose M here: the
module will be called wafer5823wdt. module will be called wafer5823wdt.
config I6300ESB_WDT
tristate "Intel 6300ESB Timer/Watchdog"
depends on WATCHDOG && X86 && PCI
---help---
Hardware driver for the watchdog timer built into the Intel
6300ESB controller hub.
To compile this driver as a module, choose M here: the
module will be called i6300esb.
config I8XX_TCO config I8XX_TCO
tristate "Intel i8xx TCO Timer/Watchdog" tristate "Intel i8xx TCO Timer/Watchdog"
depends on WATCHDOG && (X86 || IA64) && PCI depends on WATCHDOG && (X86 || IA64) && PCI
......
...@@ -39,6 +39,7 @@ obj-$(CONFIG_SC520_WDT) += sc520_wdt.o ...@@ -39,6 +39,7 @@ obj-$(CONFIG_SC520_WDT) += sc520_wdt.o
obj-$(CONFIG_EUROTECH_WDT) += eurotechwdt.o obj-$(CONFIG_EUROTECH_WDT) += eurotechwdt.o
obj-$(CONFIG_IB700_WDT) += ib700wdt.o obj-$(CONFIG_IB700_WDT) += ib700wdt.o
obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o
obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o
obj-$(CONFIG_I8XX_TCO) += i8xx_tco.o obj-$(CONFIG_I8XX_TCO) += i8xx_tco.o
obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o
......
This diff is collapsed.
/*
* i6300esb: Watchdog timer driver for Intel 6300ESB chipset
*
* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
* http://www.kernelconcepts.de
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* Neither kernel concepts nor Nils Faerber admit liability nor provide
* warranty for any of this software. This material is provided
* "AS-IS" and at no charge.
*
* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
* developed for
* Jentro AG, Haar/Munich (Germany)
*
* TCO timer driver for i8xx chipsets
* based on softdog.c by Alan Cox <alan@redhat.com>
*
* For history and the complete list of supported I/O Controller Hub's
* see i8xx_tco.c
*/
/*
* Some address definitions for the TCO
*/
/* PCI configuration registers */
#define ESB_CONFIG_REG 0x60 /* Config register */
#define ESB_LOCK_REG 0x68 /* WDT lock register */
/* Memory mapped registers */
#define ESB_TIMER1_REG BASEADDR + 0x00 /* Timer1 value after each reset */
#define ESB_TIMER2_REG BASEADDR + 0x04 /* Timer2 value after each reset */
#define ESB_GINTSR_REG BASEADDR + 0x08 /* General Interrupt Status Register */
#define ESB_RELOAD_REG BASEADDR + 0x0c /* Reload register */
/*
* Some register bits
*/
/* Lock register bits */
#define ESB_WDT_FUNC ( 0x01 << 2 ) /* Watchdog functionality */
#define ESB_WDT_ENABLE ( 0x01 << 1 ) /* Enable WDT */
#define ESB_WDT_LOCK ( 0x01 << 0 ) /* Lock (nowayout) */
/* Config register bits */
#define ESB_WDT_REBOOT ( 0x01 << 5 ) /* Enable reboot on timeout */
#define ESB_WDT_FREQ ( 0x01 << 2 ) /* Decrement frequency */
#define ESB_WDT_INTTYPE ( 0x11 << 0 ) /* Interrupt type on timer1 timeout */
/*
* Some magic constants
*/
#define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
#define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
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